This is the context for the interrupt to read to disk.
Context for the Interrupt
When a program requests data from a disk, the CPU- (central processing unit )sends a read request to the disk controller, which handles the operation asynchronously (Tanenbaum & Bos, 2022). Instead of waiting idly, the CPU continues running other tasks until the disk controller signals that the requested data is ready. This notification is sent using a hardware interrupt, which causes the CPU to pause its current execution and invoke an interrupt service routine (ISR) to handle the event (Silberschatz et al., 2020).
How the Interrupt Handler Addresses the Event
The interrupt handler typically follows these steps:
Save Context:
The CPU automatically saves the program counter and register values so execution can resume after servicing the interrupt (Silberschatz et al., 2020).
Identify the Source:
The Interrupt Service Routine (ISR) queries the interrupt controller to determine which device triggered the interrupt (Stallings, 2018).
Acknowledge the Interrupt:
The ISR informs the disk controller that the interrupt has been received, clearing the interrupt line (Stallings, 2018).
Transfer the Data:
The handler retrieves data from the disk controller’s buffer into main memory, often using Direct Memory Access (DMA) for efficiency (Tanenbaum & Bos, 2022)
Update Data Structures:
The operating system marks the I/O request as complete and wakes up any process waiting for the data (Silberschatz et al., 2020).
Restore Context & Resume Execution:
Finally, the CPU restores saved registers and resumes the interrupted process (Stallings, 2018).
Key Benefits
Using interrupts ensures that CPU time is used efficiently, reduces the need for polling, and allows other processes to continue executing while waiting for I/O (Tanenbaum & Bos, 2022).
How an interrupt handler would address the event.
When a disk controller generates a hardware interrupt, it signifies an event, such as data transfer completion or an error, requiring the CPU’s immediate attention. The CPU stops its current task, saves its context (current state), and uses an Interrupt Controller to route the signal to the correct Interrupt Service Routine (ISR). The ISR reads the disk controller’s status to determine the cause and then performs the necessary actions, such as retrieving data or initiating a new operation, before returning control to the interrupted task.
Here is a step-by-step breakdown of the process:
Interrupt Generation: The disk controller detects a significant event, like a successful data read or an error.
Interrupt Signal: The disk controller sends a hardware interrupt signal to the CPU, indicating it needs attention.
CPU Acknowledgment: The CPU completes its current instruction, then saves its current state (register values, program counter) into memory, often onto the stack.
Interrupt Controller Action: The interrupt signal is routed through a hardware interrupt controller, which helps manage and prioritize different interrupts.
ISR Identification: The CPU, using the interrupt controller, identifies the specific Interrupt Service Routine (ISR) associated with this disk controller interrupt, often via an Interrupt Vector Table.
ISR Execution: Control is transferred to the ISR, which is a piece of code designed to handle the specific interrupt.
Disks Controller Status Check: The ISR reads the disk controller’s status register to understand the cause of the interrupt (e.g., completion, error).
Action and Response: Based on the status, the ISR performs the required action, such as reading data from the controller’s buffer, signaling an error, or starting a new disk operation.
Context Restoration and Return: Once the ISR has completed its task, it restores the CPU’s saved context from memory.
Resumption of Task: The CPU resumes execution of the task it was performing before the interrupt occurred, effectively picking up where it left off. (GeeksforGeeks, 2025)
References
GeeksforGeeks. (2025a, July 12). What is an interrupt? https://www.geeksforgeeks.org/operating-systems/interrupts/
Silberschatz, A., Galvin, P. B., & Gagne, G. (2020). Operating system concepts (10th ed.). Wiley.
Stallings, W. (2018). Operating systems: Internals and design principles (9th ed.). Pearson.
Tanenbaum, A. S., & Bos, H. (2022). Modern operating systems (4th ed.). Pearson.